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SoftCores

Elsősorban 32 bites magok érdekesek, amikre van jó GCC támogatás.
1500-2500 LUT4 egy sima integer core, + perifériák. (Xilinx) LUT5-ből általában pár %-al kevesebb kell.

Az AVR 8 bites alig kisebb, de lassabb, mint egy 32bites MBLite...

LatticeMico32 (LM32 used in AMD GPU-s) Big Endian

  • GCC
  • DDR2, DDR3 hány cellát fogyaszt ezzel és enélkül ?

PicoRV32 is a very common choice, SERV is smallest, VexRiscv and Ibex are performance champions

Comparison 14 00064 G002

RiscV RV32I (32bit integer CPU base instructions) https://techstony.com/risc-v-could-debut-on-smartphones-next-year/ coming to smartphones 2022-2023 Little Endian

  • kianRiscV RiscV + MMU (runs Linux)
  • neorv32 RiscV alternatives on libhunt (a libhunt egyébként is zseniális)
  • build toolchain
  • riscv32-unknown-elf-gcc -O3 -nostdlib test1.c -o test1
  • riscv64-unknown-elf-gcc -march=rv32i -mabi=ilp32 -O3 -nostdlib test1.c -o test1
  • ./emu-rv32i test1
  • https://cdn.hackaday.io/images/9567431543387081741.jpg
  • RISC-V emulator from Fabrice Bellard
  • NPC5
    • 1.5 thousand lines of C code. It's even able to pass all 55 compliance tests for RV32I and run Zephyr RTOS examples!
  • RiscV an rv64 emulator rv/emu.go from deadsy
    • FDIV
    • FSQRT - probably the most complex floating point instruction
    • AMOADD
    • AMOSWAP - probably the most problematic memory instruction (when done in HW) with bus lock
    • AMOMAX


Verilog implementation of RV32I for UPDuino v2.0 board with iCE40UP5K FPGA:

  • main feature of it is 8-bit bus
  • and run it in Verilator (emulator of Verilog) and then put it inside iCE40 FPGA with LED as output and then RS-232.

  • it can pass MOST of compliance tests (not ALL) for example it doesn’t have any sense for me to throw unaligned memory access exception because my core can read/write 1,2 or 4 bytes from ANY address in memory (thanks to 8-bit “retro” bus);
  • I was not able to run Zephir on it yet…

MBLite vagy MicroBlaze Apparently the smallest Little Endian design (smaller than Risc-V RV32I ?)

  • MyHDL
  • Implemented on Xilinx Spartan6E FPGA Papillio Pro
    • 1200 .. 1500 LUT with minimal peripherals ? Without SDRAM controller ?
  • there is a 2 threaded version, only slightly more comple

Alvaro Lopes is the creator of the 32bit ZPUino Soft Processor that has been a huge and critical piece of the success of the Papilio Platform

  • LUT4 or LUT5 count ?

NIOS II/f

MIPS M5100

  • many SIMD instructions, eg. MAC


LEON3 Sparc been used for a long time (real historical significance)

OpenRisc1200 (hard core in Allwinner SOC, as service/spy processor) Big Endian

Gagyi, kis assembly cuccok: (ha muszáj valami, de nagyra nincs elég LUT)

  • LatticeMico 8 bites
  • picoblaze
  • zpuino ?
  • Hack MMU - lightweight protection

Source